1. Field
Example embodiments relate to a semiconductor memory device and/or a method thereof, for example, to a phase change memory device configured to generate a program current and/or a method thereof.
2. Description of Related Art
Conventional semiconductor memory devices are storage devices that store data and read out the stored data if needed. Conventional semiconductor memory devices may be roughly classified into RAM and ROM. RAM is configured to read and write data with less limitation, but data stored therein disappears at power-off. Examples of RAM include DRAM, SRAM, and so on. ROM is configured so that stored data is not deleted at power-off, but ROM may have more limitations than RAM. Examples of ROM include PROM, EPROM, EEPROM, flash memories, and so on. A flash memory is mainly divided into a NOR flash memory device and a NAND flash memory device.
Conventional semiconductor memory devices may use non-volatile materials instead of capacitors in DRAM. Examples of conventional semiconductor memory devices using non-volatile materials instead of capacitors include ferroelectric RAM (FRAM), magnetic RAM (MRAM) using tunneling magneto-resistive (TMR) films, phase change memory devices using chalcogenide alloys, and the like. In particular, a phase change memory device is a non-volatile memory device using phase change, for example, resistance change according to a temperature variation. A phase change memory device may have a simpler fabrication process. Accordingly, a memory with a larger capacity may be realized with a lower cost.
FIG. 1 shows a memory cell of a conventional phase change memory device.
Referring to FIG. 1, a memory cell 10 may include a memory element 11 and a select element 12. The memory element 11 is connected between a bit line BL and the select element 12, and the select element 12 is connected between the memory element 11 and a ground.
The memory element 11 may include a phase change material GST, which is a resistance element, for example, Ge—Sb—Te. A resistance of the phase change material GST is varied according to temperature. The phase change material GST may have either one of two stable states, i.e., a crystal or crystalline state and an amorphous state. The phase change material GST may change into a crystalline state or an amorphous state according to a current supplied via the bit line BL. A phase change memory device may program data using the characteristics of the phase change material GST.
The select element 12 may include an NMOS transistor NT. A gate of the NMOS transistor is connected to a word line WL. If a voltage is applied to the word line WL, the NMOS transistor NT is turned on. As the NMOS transistor NT is turned on, the memory element 11 is supplied with a current via the bit line BL. In FIG. 1, the memory element 11 is connected between the bit line BL and the select element 12. However, the select element 12 maybe connected between the bit line BL and the memory element 11.
FIG. 2 shows another memory cell of a conventional phase change memory device.
Referring to FIG. 2, a memory cell 20 may include a memory element 21 and a select element 22. The memory element 21 is connected between a bit line BL and the select element 22, and the select element 22 is connected between the memory element 21 and a ground. The memory element 21 is identical to the memory element 11 in FIG. 1.
The select element 22 may consist of a diode D. The memory element 21 is connected to an anode of the diode, and a word line WL is connected to its cathode. If a voltage difference between the anode and the cathode of the diode D becomes higher than a threshold voltage of the diode D, the diode D is turned on. Accordingly, a current may be supplied to the memory element via the bit line BL.
FIG. 3 is an example graph for describing characteristics of a conventional phase change material GST illustrated in FIGS. 1 and 2. In FIG. 3, a reference numeral 1 indicates a condition where a phase change material GST changes to an amorphous state, and a reference numeral 2 indicates a condition where a phase change material GST changes to a crystalline state.
Referring to FIG. 3, a phase change material GST may be set to an amorphous state by heating at a temperature higher than melting temperature Tm during a time period T1 by supplying a current and quenching. The amorphous state is called “a reset state” and corresponds to data ‘1’. Alternatively, the phase change material may be set to a crystalline state by heating at a temperature lower than the melting temperature Tm and higher than crystallization temperature Tc during a time period T2 longer than the time period T1 and slowly cooling down. The crystalline state is called “a set state” and corresponds to data ‘0’. Accordingly, a memory cell may have a resistance that is varied according to an amorphous volume of a phase change material.
A conventional phase change memory device may include a write driver circuit that is configured to supply a phase change material with a program current at a program operation. The write driver circuit may be configured to supply a memory cell with a program current, i.e., a set current or a reset current using an external power supply voltage (e.g., a power supply voltage higher than 2.5V). The set current is a current used to set a phase change material of a memory cell to a set state, and the reset current is a current used to set a phase change material of a memory cell to a reset state.
A conventional set current may have a waveform (hereinafter, referred to as a pulse waveform) having a constant magnitude during a given time and a waveform (hereinafter, referred to as a step down waveform) whose magnitude is stepped down by a given magnitude.
A set current having a conventional step down pulse may have a waveform that is decreased in steps and the step magnitude and width are fixed. Because the step magnitude and width are fixed, a waveform of a set current can not be changed. Accordingly, the set resistance distribution of a phase change material can not be adjusted.